Patent #8,510,749: Framework for
scheduling multicore processors
Issued: August 13, 2013
What is patent #8,387,065? By IBM Distinguished
Engineer Malcolm Ware
Dual core. Quad core. We hear these terms bandied about with
regard to how powerful or efficient a computer system is. But no matter the
number of cores, or threads (software code streams of execution) that get
pushed through those cores, today’s operating systems must stay within restricted
frequency ranges to keep the amount of power that’s drawn bounded and less than
the limits of the power supply.
The threads running at the same core frequency consume about
the same amount power. But keeping all the threads at the same frequency is not
terribly energy efficient and restricts differentiating thread performance.
This lack of power and performance tradeoff flexibility was
the inspiration for patent #8,387,065. Could we schedule in adjustments to the
amount of power used for different workloads?
Today’s operating systems, like our AIX, do schedule threads
to take advantage of simultaneous multi-threading (SMT) performance on a core
(one thread on one core performs better than four threads on one core), but they
still run at the same frequency on the cores, no matter their workload priority.
It doesn’t allow for critical high-priority processes from taking advantage of
the raw power that could be made available to run on a higher frequency core,
or for putting low-priority processes on cores running on lower frequency cores
which draw less power.
Making
multi-threading more efficient
A system’s software tasks carry out any number of functions;
from the mundane, such as memory management, to the intense, like crunching the
big data of a government census. The operating system schedules these tasks,
bundled as threads, across one or more cores. For example, the IBM Power 7 that
Watson used to play Jeopardy! could
manage four threads per core (of which it had 2,880).
These multi-thread capabilities are great for analyzing open domain
queries that need access to different data sources, but they also indirectly create
a cap in power consumption. But as stated above, no one thread will have more,
or less, power than another. This slows down a single task, happening on a
single core – a task that could benefit from a high frequency core, drawing
extra power to get the work done in a more timely manner.
Our team, via this patent, wants operating systems to be
able to make these high-to-low performance and power adjustments. Going back to
the AIX example, it can already schedule “packs” of threads on cores, but for
better scaled throughput – not for power adjustment reasons. The patent details
how an OS could pre-determine which threads to “pack” together, such as ones
that handle low-priority tasks, to improve efficiency by running at lower
frequencies.
The patent would also allow the OS to improve the
performance of high-priority threads by shifting power away from low-priority
threads. Now that urgent task that needs more performance, and thus power, would
finally get it, while those mundane tasks may run slightly slower, but not to
the detriment of the system. No more limiting a core’s performance!
Still yet to be tested on a system, the patent could have implications
on standard operating systems, such as AIX or Linux, to even cloud computing. A
system running in the cloud could adjust for high-priority tasks, calling for
the use of multiple data sources, by packing as many threads as possible onto
each core. It would get as much power as it needed to make the many threads
running in parallel get the work done faster than what is possible today.
IBM led in total U.S. patents for the twenty-first year in a row in 2013. Read more about patents like #8,510,749, here.
Labels: AIX, intellectual property, microprocessor, patent
